Job Description Detail for C. McCord
http://www.tracetools.com/mccord/resume
email: cm1 at adapti.com
P.O. Box 91462, Raleigh, NC 27675
Revision "B", last modified 07/27/03
Employment:
Jun. 2001 to present
Adapticom Inc.,
P.O. Box 91461 Raleigh, NC 27675-1461 919-870-0608
Principal Engineer;
management of
Adapticom Engineering Team.
VoIP
designs utilizing a wide variety of components and technologies, including the
Atmel AT75C310
dual
DSP processor
and Motorola
MC68EN302
Integrated
Multiprotocol Processor
accompanied by the
CT8020
TrueSpeech co-processor, along with
Si3044
Silicon Labs
DAA
(Data Access Arrangement)
line interface, OKI
MSM7716
"Single Rail"
linear
CODEC
,
National
TP3054
CODEC,
SiLabs
Si3220 Dual ProSLIC,
STMicroelectronics
STLC3055
SLIC,
Legerity
Am79R70
SLIC,
Intersil
HC55181
SLIC,
discrete SLICs,
as well as Atmel
Fast-VirtualNet, Atheros Communication
AR5001X Combo WLAN solution, AMD
Am1772™
wireless chipset,
Intel OC192 Wan Uplink,
and other circuitry associated with networking, VoIP and wireless communications.
Currently providing Net2Phone Inc. with
new product development expertise including:
initial electrical design,
raw PCB layout and fabrication,
prototype builds,
mechanical design,
Bill of Materials (BOM) costing / cost reduction, and
certifications (Part 15, Part 68, etc.) - mitigation work. Responsible for all hardware engineering involved in bringing to market Net2Phone's recent
product, the
Yap Jack Plus .
Nov. 1999 to Jan. 2001
Net2Phone Inc.,
Hackensack, NJ
Consulting Engineer; duties included:
Investigation of IP telephony possibilities over cable and telephone systems, attendance at trade shows and evaluation of telephony products, and
interfacing with Net2Phone business partners to develop plans for fast paced cable
telephony projects and trials.
Managed engineering team providing
documentation
and explanations of telephony
standards and protocols,
along with general industry
references.
Back to standard resume featuring FPGA skills:
http://www.tracetools.com/mccord/resume/mccord-resume-FPGA.html