Resume of C. McCord Troubleshooter
http://www.adapticom1.net/cmccord/mccord-resume-FPGA1.html
troubleshooter, IP Video Surveillance, wireless VoIP, Voice over IP
P.O. Box 91462, Raleigh, NC 27675
Revision "E", last modified 02/18/05
Summary:
Senior Electronic Engineer specializing in digital designs (166MHz+) and system designs for custom test equipment and consumer products, including VoIP and Wireless (802.11b) products, using both discrete logic, chipsets, and FPGAs.  Successful designs using Actel, Altera, & Xilinx FPGAs and FPSoCs, along with commercial processors and chipsets, for the development of timing, FPGA security, and data separation applications, utilizing Verilog, Modelsim, Viewlogic, & Orcad from both Unix and Windows based platforms.  Expertise in issues such as certifications (Part 15, Part 68, etc.), EMI mitigation, pipelined synchronous designs, clock skew, ground bounce, termination and ringing control.  Intimate knowledge of Intel based processor architecture, including "CPU bus" characteristics, as well as Internet Appliance processors and associated DSPs.  Current involvement with Motorola 56800E family of hybrid microcontrollers, utilizing CodeWarrior and Processor Expert .  Experienced in the use of logic analyzers and sophisticated test equipment along with development of custom tools, including data collection hardware, for instruction and address tracing of microprocessor bus activity during benchmarking.  Software / admin experience with "C"/"C++" and Perl in Linux/Unix/AIX and Windows environments.  Recent experience also includes consumer product development (VoIP, HTTP, FTP, TCP/IP, RS232) as a project and design lead with experience in embedded Linux, digital design (Motorola microprocessors, PLDs, FPGAs, simulation), analog design (A/D, D/A, DC/DC, AC/DC), & PCB design.
Employment:
Oct. 2003 to Present
Adapticom Inc.,
P.O. Box 91461 Raleigh, NC 27675-1461 919-870-0608
Principal Engineer; development of hardware and applications for Motorola 56800E family of hybrid microcontrollers, utilizing CodeWarrior and Processor Expert .  FPGA design focusing on the mitigation of security vulnerabilities using Actel, Altera, and Xilinx reconfigurable FPGAs and FPSoC, utilizing Verilog, Modelsim, and associated development tools. 
802.11b, wireless VoIP, Voice over IP

Mar. 2003 to Oct. 2003
Adapticom Inc.,
P.O. Box 91461 Raleigh, NC 27675-1461 919-870-0608
Principal Engineer; management of Adapticom Engineering Team.  Conducted analysis of Actel, Altera & Xilinx FPGA security vulnerabilities (bitstream security & encryption, configuration corruption, data separation, TMR, microprobing, Focused ION Beam workstations, Electron Beam Testers, decapping, power analysis, Lithium Niobate, data remanence, SEU & SEL, etc.).  Currently providing clients with new product development expertise. 
802.11b, wireless VoIP, Voice over IP
Jun. 2001 to Feb. 2003
Adapticom Inc.,
P.O. Box 91461 Raleigh, NC 27675-1461 919-870-0608
Principal Engineer; management of Adapticom Engineering Team. VoIP designs utilizing a wide variety of components and technologies. Provided Net2Phone Inc. with new product development expertise including: initial electrical design, raw PCB layout and fabrication, prototype builds, mechanical design, Bill of Materials (BOM) costing / cost reduction, and certifications (Part 15, Part 68, etc.) - mitigation work. Responsible for all hardware engineering involved in bringing to market Net2Phone's recent product, the Yap Jack Plus .
802.11b, wireless VoIP, Voice over IP
Nov. 1999 to Jan. 2001
Net2Phone Inc.,
Hackensack, NJ

Consulting Engineer; duties included: Investigation of IP telephony possibilities over cable and telephone systems, attendance at trade shows and evaluation of telephony products, and interfacing with Net2Phone business partners to develop plans for fast paced cable telephony projects and trials. Managed engineering team providing documentation and explanations of telephony standards and protocols, along with general industry references.
802.11b, wireless VoIP, Voice over IP
Feb. 1995 to Jan. 2000
IBM Corp., Dept. 2S9, Server Performance Analysis, Research Triangle Park, NC.

Contract Engineer; duties included: Sub-system, module, and gate level design of realtime high speed (166 MHz) digital systems utilizing Actel and Xilinx Field Programmable Gate Arrays , Verilog, Vhdl, Synopsys, ModelSim, Synplicity, and Viewlogic schematic capture. Conducted Verilog/VHDL benchmarking on Actel & Xilinx FPGAs. System level design of realtime high speed digital systems capable of collecting data at 1600 mbytes/second.
802.11b, wireless VoIP, Voice over IP



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