Net2Phone Related Activities
Responsible for new product development in the VoIP Internet appliance market segment, including electrical design, PCB design, package design, BOM management and cost reduction, and procurement of contract manufacturers.  As a corporate officer and head of the Adapticom engineering group, had responsibility for all new product development, including electrical design, PCB design, package design, etc.  Managed staff of engineers, manufacturing and accounting personnel.
Brought the Net2Phone "Yap Jack Plus" VoIP "dial up" product from design concept all the way to volume manufacturing.  Responsible for initial component selection and costing to bring product to proper pricing threshold. Managed continuing effort to optimize BOM and reduce costs. Prepared RFQ packages and managed communciations with tier I and tier II contract manufacturers. Procured Part 15 and Part 68 product certifications.  Coordinated team comprised of individuals in US, France, Spain, & Taiwan.  Created custom web-based documentation archival system.
Utilized "Microsoft Project" to manage scheduling dates, manpower, material procurement, manufacturing, and other gating factors.  Resolved manufacturing problems for the Aplio Pro broadband VoIP product. 
Also included: Attendance at trade shows and evaluation of telephony products, interfacing with Net2Phone business development personnel and Net2Phone business partners to develop plans for fast paced VoIP cable telephony projects and trials and the management of Adapticom engineering team, providing Net2Phone with documentation and explanations of telephony standards and protocols , along with general industry references.

IBM Related Activities
Managed the engineering and remanufacture of IBM Pcycler Version 2.4a for IBM RTP, IBM Guadalajara, and IBM Global Services. Provided rapid turn around of units to enable IBM manufacturing to make quarterly goals.
Managed multiple Server rework projects for CSC IBM RTP.
Managed engineering and manufacture of HiPot HPFI-12 Fail Inducer.
Development and support for "Realtime Trace Tools" for IBM RTP Server Performance Analysis.
1. Planning and executing the technical tasks associated with developing "first of" hardware.
2. Navigating the "political trends" within IBM, over a multi-year period, and surmounting the problems associated with a complex and expensive project such as RTS.
3. Scheduling the hardware deliverables for the project to coincide with the latest processor technology.
4. Scheduling and managing the actual collection of data to match the availability of various sever "test beds" as they evolved through the Server Performance Lab.
Management featured the judicial use of outside vendors and contractors to balance the work load, along with maintaining a consistently positive relationship with IBM management, and the use of various project management tools such as "Microsoft Project" to track the progress of the individual tasks and their gating factors.

Feb. 1995 to Dec. 1996
IBM Corp., Dept. 2S9, Server Performance Analysis, Research Triangle Park, NC.
Project Manager / Design Engineer, responsible for promoting, managing, and developing custom "deep trace" performance tools, sub-system, module, and gate level design of real time high speed (166 MHz) digital systems utilizing Actel and Xilinx Field Programmable Gate Arrays , Verilog, Vhdl, Synopsys, ModelSim, Synplicity, and Viewlogic schematic capture. Conducted Verilog/VHDL benchmarking on Actel & Xilinx FPGAs; managed Risc 6000 AIX server farm. IBM Manager: William D. Hall

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