C. McCord, Resume and Professional details (Senior Electronic Engineer with background in EMC and compliance testing. Expertise in issues such as certifications (Part 15, Part 68, etc.), EMI mitigation, pipelined synchronous designs, clock skew, ground bounce, termination and ringing control.)

http://www.adapticom1.net/cmccord/mccord-resume-EMC.html

Compliance Testing
P.O. Box 91462, Raleigh, NC 27675
Revision "C", last modified 01/30/06

Summary:
Senior Electronic Engineer with a six year background in EMC and compliance testing. Experienced in digital design, power supplies, FPGA design, microcontrollers, and Intel architecture. Intimate knowledge of Deschutes, Tanner, Cascades, and Pentium Pro (P6) architecture, including "cpu bus" characteristics. Expertise in issues such as certifications (Part 15, Part 68, etc.), EMI mitigation, pipelined synchronous designs, clock skew, ground bounce, termination and ringing control. Experienced in the use and development of custom tools, including data collection hardware for IBM Server Performance. Software experience with "C", Pearl, Basic and scripting in AIX/Unix/Linux and Windows environments. Extensive experience with IBM Corp. in lab setup, R&D, debug, and development of custom test equipment. Excellent work attitude and demeanor; many references available.

Employment:
Jan. 2000 to Present - Principal Engineer, Adapticom Inc., P.O. Box 91461 Raleigh, NC 27675-1461 919-870-0608
2004/2005:

Electro-mechanical development of a family of microprocessor based inflators for the bedding industry. Experience included EMC and compliance testing at both UL and TUV Rhineland labs in RTP area. Creation of test plans and test requests along with scheduling of EMC test facilities. Reviewed product functional specifications, schematics, Bill of Materials, and other product documents to support EMC compliance.
Design of IP Video Surveillance system for small business owners needing to actively monitor multiple sites in real-time for loss prevention and security. Completed roll-out into fast food restaurant chain.
Time-critical rework and configuration services for large computer manufacturers (IBM, Cisco, etc).
Impartial testing services for evaluating consumer appliances.
Completed FPGA verilog based reference designs for Actel ProASIC, Altera Max 3000, and Xilinx Spartan II, using Verilog, Viewlogic, Modelsim, and associated development tools.
Design development based on 56800E family of hybrid microcontrollers, utilizing CodeWarrior and Processor Expert .

2003

Finalized hardware development for Yap Jack Plus and Yap Jack Pro VoIP products for Net2Phone Corporation. Conducted compliance testing for EMC Part 15 and Part 68. Modified design and implemented "design for compliance" features into PCB. Researched cost effective radiation mitigation techniques for use in large scale production. Creation of test plans and test requests along with scheduling of EMC test facilities. Reviewed product functional specifications, schematics, Bill of Materials, and other product documents to support EMC compliance.
Conducted analysis of Actel, Altera & Xilinx FPGA security vulnerabilities (bitstream security & encryption, configuration corruption, data separation, TMR, microprobing, Focused ION Beam workstations, Electron Beam Testers, decapping, power analysis, Lithium Niobate, data remanence, SEU & SEL, etc.).

2000 - 2002

Refresh and fabrication of test equipment for IBM RTP, including "IBM Power Cycling Mouse Simulators" and "Four Port HiPot Fail Inducers".
VoIP designs utilizing a wide variety of components and technologies, including the Atmel AT75C310 dual DSP processor and Motorola MC68EN302 Integrated Multiprotocol Processor accompanied by the CT8020 TrueSpeech co-processor, along with Si3044 Silicon Labs DAA (Data Access Arrangement) line interface, OKI MSM7716 "Single Rail" linear CODEC , National TP3054 CODEC, SiLabs Si3220 Dual ProSLIC, STMicroelectronics STLC3055 SLIC, Legerity Am79R70 SLIC, Intersil HC55181 SLIC, discrete SLICs, as well as Atmel Fast-VirtualNet, Atheros Communication AR5001X Combo WLAN solution, AMD Am1772™ wireless chipset, Intel OC192 Wan Uplink, and other circuitry associated with networking, VoIP and wireless communications.
Furnished Net2Phone Inc. with new product development expertise including: initial electrical design, raw PCB layout and fabrication, prototype builds, mechanical design, Bill of Materials (BOM) costing / cost reduction, and certifications (Part 15, Part 68, etc.) - mitigation work. Responsible for all hardware engineering involved in bringing to market Net2Phone product, the Yap Jack Plus .

Feb. 1995 to Jan. 2000 - IBM Corp., Dept. 2S9, Server Performance Analysis, Research Triangle Park, NC.

Contract Engineer; duties included: Sub-system, module, and gate level design of real-time high speed digital systems utilizing Actel and Xilinx Field Programmable Gate Arrays , Verilog, Synopsys, ModelSim, Synplicity, and Viewlogic schematic capture. Conducted Verilog/VHDL benchmarking on Actel & Xilinx FPGAs.
System level design of real-time high speed digital systems capable of collecting data at 1600 mbytes/second.

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