Randall L. Luck

To apply my wide range of skills and technical knowledge to creating innovative and useful solutions for your company or organization.

Over 28 years of invention, creativity and technical innovation. Experienced with digital, analog, and mixed signal hardware design from DC to RF; embedded microcontroller system hardware and software design and C programming; digital video system design; image processing and computer vision algorithms and theory; implementing 1D, 2D and 3D signal processing algorithms in hardware, software, and FPGA's; Altera CPLD and FPGA design; embedded C programming of PC's for system control; motion control using stepper motors; PID algorithm development for control of DC motors; power circuits using MOSFETs and thyristors, design of user interfaces; design of high speed, complex multilayer surface mount and through-hole PCB's; interfacing with various UL and FCC standards testing procedures. Also skilled in handling project management of small teams of technical personnel; concurrent design; reverse engineering; writing reports; working trade shows; creating product literature; doing feasibility studies; preparing proposals; writing technical papers; and giving presentations. Able to quickly grasp key points and understand how they relate to a project. Makes conceptual leaps beyond the current problem. Works well in a fast paced environment and can quickly learn new material. Projects worked on are or have been used in consumer, industrial, medical, research, and military markets.

C for embedded PIC microcontrollers (Bytecraft and Microchip), C for PC (Microsoft, Watcom, DJGPP (GNU)), QBASIC, OrCAD Capture (schematic) and Layout (PC board design) Version 9.2 for Windows, OrCAD SDT Version 4, Microchip MPLAB, Xilinx Virtex series (VHDL), Altera Quartus II (VHDL) and Maxplus II (schematics and AHDL) FPGA and CPLD design, AMD PALASM PLD design, Design Computation DC-CAD PCB design, Microsoft Windows xx, Word, Excel, and MS-DOS, Adobe Photoshop.

1973 - 1977 State University of New York at Albany
BS in Atmospheric Science with minor in Computer Science


2000 - Present   Engineer, Adapticom, Inc., Raleigh, NC.
2002 - 12/2005   MDK, Inc. (K-LIne Electric Trains) Chapel Hill, NC
Chief electronics engineer for a major producer of O gauge model electric trains for the hobby market. Led the design of a new remote control system that uses a bidirectional 915 Mhz RF link. Did all hardware design and PCB layout for the handheld controller, the engine transceiver, and a serial port adapter that allows interoperability with other legacy systems. These 3 parts of the remote control system all use the Chipcon CC1010 transceiver / 8051 embedded microcontroller chip. Designed all peripherals that interface to this chip. The handheld includes an LCD, keypad, NiMH battery charger, several audio components, and the CC1010 RF microcontroller. The transceiver includes a small switching regulator, several MOSFET drivers, LED drivers, serial interfaces, and the CC1010. The serial port adapter includes two RS-232 serial ports and the CC1010. Designed the hardware and PCB for an audio playback board that uses the Microchip dsPIC30F210 DSP controller chip with an Atmel Dataflash for sound storage and a 2-watt audio amplifier. Performed the application level programming for this using C. It plays back 4 channels of 1/2 CD quality audio for realistic train sounds. Designed hardware, PCB and software using C for a 120 Watt hobby transformer that uses a Microchip PIC microcontroller to control triac triggering, handle over current protection and sample the control knob. Designed hardware, PCB and all software using C for several DC motor controllers using PIC microcontrollers and a PWM MOSFET H bridge motor driver. This board is closed loop and uses a PID control algorithm to regulate motor speed. The transceiver, audio and motor PCBs are all physically small with fine pitch SMT components on both sides. Designed numerous pieces of test hardware and software to program and verify functionality of these various products. A patent for the remote control system has been applied for.

1999 - 2002   DEXTRA SYSTEMS, INC. (full time) Cary, NC

Activities included embedded, digital, analog, and mixed signal circuit, system, and PCB design. Also, logic design and intellectual property creation using Altera FPGA/CPLDs, and high speed digital video and digital signal processing. Clients have included:  Elliott Technologies, Apex, NC, Adapticom, Raleigh, NC, EEDynamics, Cary, NC, and Aspex Inc, New York, NY, ITS, Raleigh, NC
Prime contractors have included:  Net2Phone, Firetrol, Lockheed Martin, AlaCart, ADS, and numerous others.
Projects have included:
-Hardware and software design of a garage door timer.
-Analog and digital circuit designs and PCB layouts.
-An optocoupler link for test equipment.
-Reverse engineering, costing, and evaluation of many circuits.
-A motherboard for a multimedia system intended for transit buses.
-A multi-function PCI bus add-in card with inputs, outputs, half and micro-step controllers, and 12 bit DACs. The PCI interface is implemented in an Altera MAX CPLD and the step controllers are done in an Altera ACEX FPGA device. Performed all circuit, PCB, and CPLD design.
-Created the PLDSP reconfigurable digital signal processing board, an ISA card with four Altera FPGA devices, data links, I/O connectors, and SRAM for rapid prototyping and design verification tasks.

1995 - 2000   ASPEX INCORPORATED Cary, NC
1977 - 1995   ASPEX INCORPORATED New York, NY
Founding partner and Vice President of Research and Engineering for Aspex Incorporated, a high technology company based in New York which primarily works on applications of electronic imaging. Worked on projects both for Aspex' products and for clients of Aspex on a consulting basis:

1994 - 2000 GNOSSP and RTIVP SBIR contracts
Applied for and received two Phase 1 and two Phase 2 Small Business Innovation Research (SBIR) contracts from the US Department of Commerce - NIST totaling $500,000. The projects developed a prototype of the Generic Neighborhood Operator and Scale Space Processor, hardware that computes vectors of partial derivative images up to fourth order at selectable scale space filtering (similar to wavelets), and the Real Time Image Vector Processor, hardware that computes projections on vectors of these partial derivative images.  The combined system performs machine vision and image pattern recognition at video frame rates. The hardware consists of 21 ten-layer 9U x 400mm VME circuit cards. The system processes at rates in excess of 50 billion arithmetic operations per second with the image processing performed in custom logic in Altera FLEX FPGA devices.

1997 MFIO
Designed a multifunction I/O board, an ISA card for use in the Aspex Spintrak product.
1995 - 1997 Tapered Quality Measurement System, DuPont, Parkersburg, WV
Developed hardware, software, and the mechanical design for a machine vision inspection system that measured extruded tapered filaments for QC purposes. The system measured filaments' length, diameter, taper, curl, and other parameters, and reported the results. It included stepper motion control, a video camera and microscope, a frame grabber, lighting, and a computer. Wrote all control and image processing software in 32 bit Watcom C. These filaments are used in paintbrushes.

1994 - 1995 VL Frame Grabber
Designed and implemented a monochrome video frame grabber board for use with VESA Local Bus (VL Bus) PC's. The board featured genlock, low noise, and programmable sample rates, offset, and gain. Images were memory mapped and data was transferred to the CPU at up to 66 Mbytes per second. It was used in Aspex' Spintrak 2000 inspection system from

1992 - 1995 SpinTrak 2000
Co-managed the initial development of this product. It is an automated inspection microscope used by the synthetic fiber industry for inspecting spinnerets. It uses machine vision to inspect the dimensions and cleanliness of the spinneret's capillaries. This system continues today to be Aspex' main product and well over 100 systems have been sold to date worldwide. 

1992 - 1993 Hollow Fiber Inspection System, Althin Medical Inc. Miami Lakes, FL
Developed hardware, software, and the mechanical design for a machine vision inspection system that measured the inner diameter and wall thickness of hollow fibers with one micron accuracy in real-time as they were being extruded. The system included motion control, a video camera and microscope, a frame grabber, lighting, and a computer. Wrote all control and image processing software in Microsoft C. Invented the optics used to properly image the outer and inner diameters. These fibers are used as filters in kidney dialysis equipment.

1989 - 1992 PAPNET, Neuromedical Systems Inc. (NSI), Suffern, NY
Served as consulting Engineering Manager and team leader of the design of the prototype PAPNET Cytological Screening System. Integrated the Aspex PIPE image processor with a computer controlled microscope and an HNC neural network coprocessor to create a system that automatically identified areas on microscope slides of pap smears as suspicious for cancer cells. Responsible for primary image processing and machine vision design, overall system design and project management of a staff of 10 programmers and technicians. Got initial proof of concept functioning in less than six months. Partly as a result of this work, NSI ultimately raised investments of approximately $135,000,000. Received two US patents from this effort. These patents and all of NSI’s IP are now owned by Tripath Imaging of Burlington, NC.

1984 - 1994 PIPE Model 1 Image processor
Was a principal architect of the Aspex PIPE Model 1 system and co-managed its development into a product. It was a programmable, parallel image processor that combined the flexibility of a general-purpose processor with the speed of custom hardware. It processed images at up to 1.2 billion operations per second. The processors were made of parallel custom hardware built with up to 5000 SSI and MSI integrated circuits. Designed the programming environment for the PIPE, which consisted of a windowing graphical user interface in 1986, well before the popularity of today's GUI's like Windows. Co-wrote the business plan for this product which helped raise $500,000 in investment. The PIPE was given an IR-100 award as one of the 100 most innovative products of 1986 by R&D magazine. About 42 systems were sold to customers including the Navy, Army, NASA, NIST, Lockheed, LTV, General Dynamics, FMC, MIT Lincoln Labs, Neuromedical Systems, and the University of Wisconsin, and to research centers in China, Korea, and Taiwan.

1984 - 1986 Scan Converters, Diagnostic Retrieval Systems Inc. (DRS), Oakland NJ
Assisted with invention, conceptual design and proposal writing for a digital radar scan converter that converted rho-theta radar data into X-Y graphical images using a reverse conversion technique. Did signal processing design and co-designed hardware for digital CFAR clutter reducing circuitry. DRS sold six systems to Elbit Ltd. of Israel. Designed a digital radar signal simulator on a Multibus platform for testing the scan converter. Was part of the team that did the conceptual design and proposal writing for DRS' bid for the US Navy's AN/SPA-25G digital radar scan converter system.

1983 - 1985 Tytem, Medical Laboratory Automation Inc. (MLA), Pleasantville, NY
Designed overall architecture and all electronic hardware for Tytem, an 8085 microprocessor controlled blood bank centrifuge. It included an embedded 8085 processor that controlled the speed, user keypad, and display LED's. Also designed the SCR motor speed controller. Took this project from proposal to production. MLA produced over 1000 of this product under contract to Ortho Pharmaceuticals.

1978 - 1984 Video and audio projects for various customers
-Designed video digitizing sections of a video frame store that was used by researchers at the National Bureau of Standards (NBS, now NIST) as the range sensing robotic vision system for the Automated Manufacturing Research Facility (AMRF). Aspex sold 6 systems.
-Designed and constructed a prototype 1 kW switching amplifier (class D) used to drive a subbass woofer loudspeaker. Twenty-five years later, class D amplifiers are now becoming popular. Implemented upgrades and modifications to several high fidelity loudspeaker systems. Part of the design team of the Ohm Walsh 2 speaker system.
-Did various video circuit design projects for a small TV commercial studio.

20040239268, Grubba, R., Luck, R., Toombs, T., “Radio-linked, Bi-directional control system for model electric trains” (applied for in 2003)
5,257,182, Luck, R., and R. Scott, "Morphological Classification System and Method" (1993)
5,287,272, Luck, R.,et. al. "Automated Cytological Specimen Classification System and Method" (1994)
Published author of 13 papers in various conference proceedings including SPIE and Electronic Imaging conferences.
Luck, R., "Some Applications for the PLDSP Reconfigurable Signal Processor", Proc. SPIE Conf. on Reconfigurable Technology: FPGAs for Computing and Applications, V.3844, 61-69 (1999).
Luck, R., R. Tjon, L. Mango, J. Recht, E. Lin, J. Knapp, "PAPNET: An Automated Cytology Screener using Image Processing and Neural Networks", Proc. SPIE 20th AIPR Workshop, V.1623, 161-171 (1991).
Luck, R., "Integration of Real Time Systems: Image Processing and Image Feature Extraction", Proc. Elect Imaging West '91, 253-256 (1991).
Rangachar, R., T-H Hong, M. Herman, R. Luck, "Analysis of Optical Flow Estimation Using Epipolar Plane Images", US Dept. of Comm., NIST, NISTIR 4569, (1991).
Rangachar, R., T-H Hong, M. Herman, R. Luck, "Three Dimensional Reconstruction from Optical Flow using Temporal Integration", US Dept. of Comm., NIST, NISTIR 4570, (1991).
Rangachar, R., T-H Hong, M. Herman, R. Luck, J. Lupo, "Real-Time Differential Range Estimation Based on Time-Space Imagery Using PIPE", Proc. SPIE Real-Time Image Processing II, V. 1295 (1990).
Luck, R., "ASPIPE: A Graphical User Interface for the PIPE System", Proc. SPIE Conf. on Image Understanding and the Man-Machine Interface, V.1076, 180-190 (1989).
Luck, R., "Multiple Object Analysis Using a Real Time Connected Component Processor", presented at Electronic Imaging East '89.
Luck, R., "An Overview of the PIPE System", Third Int'l Supercomputer Conf, Vol III, Boston, MA, (1988).
Luck, R., "Translation, Scale, and Rotation Invariant Pattern Recognition Using PIPE", Proc. Electronic Imaging East '88", 909-918 (1988).
Luck, R., "Implementing an Image Understanding System Architecture using PIPE", Proc. SPIE Conf. on Automated Inspection and Measurement, V.849, 35-41 (1987).
Luck, R., "PIPE: A Parallel Processor for Dynamic Image Processing", Proc. SPIE Conf. on Image Understanding and the Man-Machine Interface, V758 (1987).
Luck, R., "Using PIPE for Inspection Applications", Proc. SPIE Conf. on Automated Inspection and Measurement, V.730, 12-19 (1986).

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