FPGA digital design, high speed, logic design, vhdl verilog design pcad allegro FPGA

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Revision L., last modified 01/16/03
fpga design, hardware engineer, digital design, high speed, logic design, vhdl verilog design pcad allegro consultant aix, unix

Always ready to consider a project with a very high degree of difficulty!

LONG TERM GOAL: Challenging work.

trace tools, performance

My current hourly rate (always negotiable).

realtime tracing

HOTTEST activities: